Contents7 sections
Cerebras serves trillion-parameter models by splitting them across many wafer-scale chips and running those chips as a pipeline. Each wafer holds a few of the model's layers in on-chip SRAM, the weights never move, and only the intermediate results (activations) travel to the next wafer. As of October 2026, Cerebras' engineering blog walks through a concrete case: the open-weights Kimi K3, roughly 3 trillion parameters, mapped onto 59 WSE-3T wafers. This guide follows that math, then compares it with how GPU clusters serve the same class of model.
What is the Cerebras wafer-scale engine?
Most chips are cut from a silicon wafer, dozens or hundreds at a time. Cerebras skips the cutting and uses the entire wafer as one processor. According to the Cerebras chip page, the current WSE-3 Turbo (WSE-3T) measures 46,225 mm² and packs 4 trillion transistors and 900,000 AI cores, rated at 250 petaflops of AI compute. The company says it handles manufacturing defects with redundant cores and routing that work around flaws.
For inference, the figure that matters most is memory: each WSE-3T has 44 GB of on-chip SRAM. SRAM sits right next to the compute cores and is extremely fast to read, but 44 GB is small next to the high-bandwidth memory (HBM) stacked beside a modern GPU. That is why any frontier-scale model has to be spread across many wafers.
- One wafer, one chip: no dicing, so on-chip communication stays on silicon.
- Weights on-chip: generating a token does not require fetching weights from off-chip memory.
- System packaging: the CS-4 rack system announced in August 2026 contains three WSE-3T processors.
The math: fitting a 3T-parameter model on 59 wafers

Kimi K3 has 93 layers: 69 linear-attention layers and 24 dense (full-attention) layers. Cerebras' example assumes 4-bit weight quantization, an 8-bit KV cache and a 256k-token average request.
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1. Size each layer
Three trillion parameters at 4 bits (half a byte) each is about 1.5 TB of weights. Divided across 93 layers, that is roughly 16 GB per layer.
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2. Place layers by type
Dense layers store keys and values for every token of every active request, so Cerebras puts one dense layer per wafer and leaves the rest of the SRAM for KV cache. Linear-attention layers keep only a small fixed-size state per request, so two fit on one wafer (2 × 16 GB = 32 GB).
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3. Count the wafers
69 linear layers at two per wafer need 35 wafers; 24 dense layers need 24. Total: 59 wafers.
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4. Wire them together
Only activations cross between wafers, over RDMA on Ethernet, at roughly 2 microseconds per hop.
The key detail is that one ~16 GB layer is smaller than one 44 GB wafer. Most layers therefore fit whole on a single chip, nothing needs to be split mid-layer, and the weights stay where the compiler placed them. On each dense-layer wafer, about 28 GB (44 GB minus one 16 GB layer) is left for KV cache.
The 59-wafer figure is an illustrative calculation from Cerebras. The blog says production deployments use much finer-grained stages, and changing request length or quantization changes the count.
How the pipeline serves many requests at once
Think of the wafers as stations on an assembly line. Wafer 1 runs layers 1–2 and hands its activations to wafer 2, which runs layers 3–4, and so on until the last wafer emits the next token.
A common objection is that most wafers would sit idle while one token travels down the line. Cerebras' answer is that it keeps the line full: while stage 3 works on request A, stage 2 works on request B and stage 1 on request C. Each stage can also process a small micro-batch of requests, so the number of requests in flight is roughly the number of stages times the micro-batch size. Unlike a classic GPU batch, these requests do not wait for one another to finish.
Micro-batch size
- Smaller
- Each request runs faster
- Larger
- Total throughput rises
SRAM left for KV cache
- Smaller
- Lower cap on concurrent requests
- Larger
- More long-context, concurrent requests
Number of pipeline stages
- Smaller
- More work per stage
- Larger
- More requests in flight
The hard ceiling on concurrency is on-chip memory for KV cache, because every in-flight request needs its own cache on every dense-layer wafer. Cerebras argues that neither concurrency nor batch size is the right efficiency metric; it suggests comparing tokens per second per megawatt at the same output speed.
Cerebras vs GPU inference: what actually differs
GPU clusters also split giant models across many chips, but the memory layout is different. Per NVIDIA's technical blog, a Blackwell Ultra (B300) GPU carries up to 288 GB of HBM3E with 8 TB/s of bandwidth and 1.8 TB/s of NVLink, enough to hold 300B+ parameter models without offloading. The GB300 NVL72 rack ties 72 of these GPUs into one NVLink domain.
Where weights live
- Cerebras WSE-3T
- On-chip SRAM, 44 GB per wafer
- NVIDIA B300 GPU
- Off-die HBM3E, up to 288 GB per GPU
Holding 1.5 TB of weights
- Cerebras WSE-3T
- Layers spread over many wafers (59 in the example)
- NVIDIA B300 GPU
- At least 6 GPUs by raw capacity, more once KV cache is counted
How the model is split
- Cerebras WSE-3T
- Layer-wise pipeline stages
- NVIDIA B300 GPU
- Mix of tensor, expert and pipeline parallelism
Traffic between chips
- Cerebras WSE-3T
- Activations only, ~2 µs per hop (vendor figure)
- NVIDIA B300 GPU
- Activations and partial results over NVLink and network
Main strength
- Cerebras WSE-3T
- Fast token generation (decode)
- NVIDIA B300 GPU
- Broad software stack, training and general compute
Interactive decoding is usually limited less by raw math than by how fast weights can be read from memory for each new token. Cerebras attacks that bottleneck by keeping weights next to the cores; GPUs lean on large HBM pools and batching to push aggregate throughput. The '6 GPUs' row is simple division (1.5 TB ÷ 288 GB) and real deployments vary widely.
Treat speed comparisons carefully. Cerebras says CS-4 delivers up to 30x faster inference than GPU systems, citing Artificial Analysis and internal benchmarking from August 2026, and that it exceeds 1,000 tokens per second on models above 10 trillion parameters, a figure it labels an extrapolation. Its own site notes that results vary by workload, configuration, date and model.
What this means for users and developers
The difference you feel is mostly streaming speed. Cerebras reports multi-trillion-parameter models running at 1,000–2,000+ tokens per second, which matters most for long code generation and multi-step agent loops. Time to first token is a separate cost that grows with prompt length.
- Check model support: confirm the model you need is offered on Cerebras Cloud and whether quantization (for example 4-bit) affects quality for your task.
- Separate the metrics: output tokens per second, time to first token and speed under concurrent load are different numbers.
- Read the pricing terms: per-token price, rate limits and context-length caps change over time.
- Know the deployment shape: CS-4 supports disaggregated setups where GPUs or other accelerators do prefill and Cerebras does decode, so end-to-end latency depends on the whole stack.
To keep up with AI chip and model announcements, follow the Theddari AI Telegram trends feed, and use the earnings calendar to see when NVIDIA and other AI hardware companies report.
In short, Cerebras does not serve trillion-parameter models on one giant chip. It runs a pipeline of wafers that each keep a slice of the weights in on-chip SRAM and pass only activations along. The real contrast with GPUs is where the weights live and what moves between chips, and any speed claim is only as fair as the test conditions behind it.



